1 fn6298.1 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2006, 2011. all rights reserved all other trademarks mentioned are the property of their respective owners. 5962-0620705, 5962-0620706, 5962-0620707, 5962-0620708 15kv esd protected, +5.0v 1microamp, 250kbps, rs-232 tran smitters/receivers the intersil 5962-062070xqxa devices are 5.0v powered rs-232 transmitters/receivers which meet ela/tia-232 and v.28/v.24 specifications. addi tionally, they provide 15kv esd protection (iec61000-4-2 air gap and mil-std 883 human body model) on transmitter outputs and receiver inputs (rs-232 pins). targeted applications include ruggedized portable products and remotely deployed devices exposed to extreme temperature and humidity where the low operational and even lower standby, power consumption is critical. efficient on-chip charge pumps, coupled with manual and automatic power-down functions (except for the 5962-0620707q 2a), reduce the standby supply current to a 1a trickl e. small footprint packaging and the use of small, low value capacitors ensure board space savings as well. data rates greater than 250kbps are guaranteed at worst case load c onditions. this family is fully compatible with 5.0v-only systems. specifications for qml devices are controlled by the defense logistics agency land and maritime (dla). the smd numbers listed here must be used when ordering. detailed electrical specifications for these devices are contained in smd 5962-06207. a ?hot-link? is provided on our website for downloading. features ? meets eia/tia-232 and v.28/v .24 specifications at 5v ? electrically screened to dla smd#5962-06207 ? qml qualified per mil-prf-38535 requirements ? smd compliance ? military temperature range ? latch-up free ? hermetic package ? esd protection for rs-232 i/o pins to 15kv (iec61000) ? guaranteed mouse driveability (icl3243e) ? requires single +5.0v 10% power supply ? receiver hysteresis for improved noise immunity ? low power automatic power-down modes (except for icl3232e) . . . . . . . . . . . . . . . . . . . . . . . . .1a ? guaranteed minimum 250kbps data rate ? manual and automatic power-down features ? multiple drivers/receivers ? on-chip voltage converters require only four external capacitors ? regulated dual charge pumps applications ? any military or high-rel system requiring rs-232 communication ports - battery powered, hand-held, and portable equipment - ruggedized handheld gps, laptop computers, notebooks, palmtops - industrial control/shop floor communications - field deployed sensors/devices exposed to extreme temperature/humidity - ruggedized cellular/mobile phones ordering information desc p/n configuration temp (c) package 5962-0620705q3a icl3243e 3d/5r -55 to +125 28 ld clcc 5962-0620706q3a icl3238e 5d/3r -55 to +125 28 ld clcc 5962-0620707q2a icl3232e 2d/2r -55 to +125 20 ld clcc 5962-0620708q2a icl3221e 1d/1r -55 to +125 20 ld clcc data sheet november 3, 2011
2 fn6298.1 november 3, 2011 pinouts icl3221e (clcc) top view icl3232e (clcc) top view icl3243e (clcc) top view icl3238e (clcc) top view en c1+ c1- c2+ c2- v- r1 in r1 out forceoff gnd t1out nc forceon invalid vcc t1 in 3 4 5 6 7 9101112 220 119 8 15 14 18 17 16 13 nc nc nc v+ c1+ v+ c1- c2+ c2- v- t2 out r2 in vcc t1 out r1 in r1 out t1 in r2 out gnd t2 in 3 4 5 6 7 9101112 220 119 8 15 14 18 17 16 13 nc nc nc nc 23 24 25 22 21 20 19 11 3 2 1 4 14 15 16 17 18 12 13 28 27 26 10 5 6 7 8 9 r 1 in v- c2- c 1 + v+ vcc c2+ t 3 in t 2 in t 1 in r 4 out r 3 out r 2 out r 5 out r 1 out r 2outb invalid forceon c1- gnd forceoff t 3 out t 2 out t 1 out r 4 in r 3 in r 2 in r 5 in 23 24 25 22 21 20 19 11 3 2 1 4 14 15 16 17 18 12 13 28 27 26 10 5 6 7 8 9 v- gnd c1+ v+ vcc c2+ t5 in t4 in t3 in r3 out r2 out r1 out r1outb invalid forceon forceoff t3 out t2 out t1 out r1 in r3 in r2 in c2- t4 out t5 out t2 in t1 in c1- 5962-0620705, 5962- 0620706, 5962-0620707, 5962-0620708
3 fn6298.1 november 3, 2011 pin descriptions pin function v cc system power supply input (4.5v to 5.5v). v+ internally generated posit ive transmitter supply. v- internally generated negat ive transmitter supply. gnd ground connection. c1+ external capacitor (voltage doubl er) is connected to this lead. c1- external capacitor (voltage doubl er) is connected to this lead. c2+ external capacitor (voltage inve rter) is connected to this lead. c2- external capacitor (voltage inve rter) is connected to this lead. t in ttl/cmos compatible transmitter inputs. (note 1) t out 15kv esd protected, rs-232 level (nominally 5.5v) transmitter outputs. r in 15kv esd protected, rs-232 compatible receiver inputs. r out ttl/cmos level receiver outputs. r outb ttl/cmos level, noninverting, always enabled receiver outputs. invalid active low output that indicates if no valid rs -232 levels are present on any receiver input. en active low receiver enable control. forceoff active low control to shut down transmitters and on-chip power supply. this overrides any automatic circuitry and forceon (see tables 1 & 2, note 1). forceon active high input to override automatic power-down circuitry thereby keeping trans mitters active. (forceoff must be high, note 1). note: 1. the icl3238e input pins incorporate positive feedback resistors. once the input is driven to a valid logic level, the feedbac k resistor maintains that logic level until v cc is removed. unused transmitter input s may be left unconnected by the user. table 1. power-down logic truth table rcvr or xmtr edge within 30 sec? forceoff input forceon input transmitter outputs receiver outputs r outb output rs-232 level present at receiver input? invalid output mode of operation icl3238e no h h active active active no l normal operation (enhanced auto power-down disabled) no h h active active active yes h yes h l active active active no l normal operation (enhanced auto power-down enabled) yes h l active active active yes h no h l high-z active active no l power-down due to enhanced auto power-down logic no h l high-z active active yes h x l x high-z high-z active no l manual power-down x l x high-z high-z active yes h 5962-0620705, 5962- 0620706, 5962-0620707, 5962-0620708
4 fn6298.1 november 3, 2011 invalid driving forceon and forceoff (emulates automatic power-down) x note 2 note 2 active active active yes h normal operation x note 2 note 2 high-z high-z active no l forced auto power-down note: 2. input is connected to invalid output. table 1. power-down logic truth table (continued) rcvr or xmtr edge within 30 sec? forceoff input forceon input transmitter outputs receiver outputs r outb output rs-232 level present at receiver input? invalid output mode of operation table 2. power-down and enable logic truth table rs-232 signal present at receiver input? forceoff input forceon input en input transmitter outputs receiver outputs (note 3) r outb outputs invalid output mode of operation icl3221e no h h l active active n.a. l normal operation (auto power-down disabled) no h h h active high-z n.a. l yes h l l active active n.a. h normal operation (auto power-down enabled) yes h l h active high-z n.a. h no h l l high-z active n.a. l power-down due to auto power-down logic no h l h high-z high-z n.a. l yes l x l high-z active n.a. h manual power-down yes l x h high-z high-z n.a. h manual power-down w/rcvr. disabled no l x l high-z active n.a. l manual power-down no l x h high-z high-z n.a. l manual power-down w/rcvr. disabled icl3243e no h h n.a. active active active l normal operation (auto power-down disabled) yes h l n.a. active active active h normal operation (auto power-down enabled) no h l n.a. high-z active active l power-down due to auto power-down logic yes l x n.a. high-z high-z active h manual power-down no l x n.a. high-z high-z active l manual power-down note: 3. applies only to the icl3243e. 5962-0620705, 5962- 0620706, 5962-0620707, 5962-0620708
5 fn6298.1 november 3, 2011 absolute maximum rati ngs thermal information v cc to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6v v+ to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 7v v- to ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3v to -7v v+ to v- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14v input voltages t in , forceoff , forceon, en . . . . . . . . . . . . . . . -0.3v to 6v r in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25v output voltages t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2v r out , invalid . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to v cc +0.3v short circuit duration t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous esd rating (receiver input and transmitter output pins) . . . 15kv thermal resistance (typical) ja (c/w) 20 ld clcc package . . . . . . . . . . . . . . . . . . . . . . . 90 28 ld clcc package . . . . . . . . . . . . . . . . . . . . . . . 70 maximum junction temperature (ceramic package) . . . . 150c maximum storage temperature range . . . . . . . . . . . -65c to 150c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300c operating conditions temperature range icl32xxe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55c to 125c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. electrical specifications icl3221e, icl3232e, icl3243e test conditions: v cc = 4.5v to 5.5v, c1 = 0.01 m f, c2 - c4 = 0.1 m f; unless otherwise specified. typicals are at t a = 25c, v cc = 5.0v parameter test conditions temp (c) min typ max units dc characteristics supply current, automatic power-down all r in open, forceon = gnd, forceoff =v cc (icl3221e, icl3243e only) full - 1 10 a supply current, power-down forceoff = gnd (except icl3232e) full - 1 10 a supply current, power-up all outputs unloaded, forceon = forceoff =v cc full - 0.3 1.8 ma logic and transmitter inputs and receiver outputs input logic threshold low t in , forceon, forceoff , en full - - 0.8 v input logic threshold high t in , forceon, forceoff , en full 2.2 - - v input leakage current t in , forceon, forceoff , en full - 0.01 10 a output leakage current (except icl3232e) forceoff =gnd or en =v cc full - 0.05 10 a output voltage low i out = 1.6ma full - - 0.4 v output voltage high i out = -1.0ma full v cc -0.9 v cc -0.3 - v automatic power-down (icl3221e, icl3243e only, forceon = gnd, forceoff = v cc ) receiver input thresholds to enable transmitters powers up full -2.7 - 2.7 v receiver input thresholds to disable transmitters powers down full -0.3 - 0.3 v invalid output voltage low i out = 1.6ma full - - 0.4 v invalid output voltage high i out = -1.0ma full v cc -0.9 - - v receiver inputs input voltage range full -25 - 25 v input threshold low full 0.6 1.2 - v input threshold high full - 1.5 2.4 v input resistance full 3 5 7 k transmitter outputs output voltage swing all transmitter outputs loaded with 3kw to ground full 5.0 5.4 - v output resistance v cc = v+ = v- = 0v, transmitter output = 2v full 300 10m - output short-circuit current full - 35 60 ma 5962-0620705, 5962- 0620706, 5962-0620707, 5962-0620708
6 fn6298.1 november 3, 2011 output leakage current v out = 12v, v cc = 0v or 4.5v to 5.5v (icl3232e,v cc = 0v only) automatic power-down or forceoff =gnd full - - 25 a mouse driveability (icl3243 only) transmitter output voltage t1 in =t2 in =gnd, t3 in =v cc , t3 out loaded with 3kw to gnd, t1 out and t2 out loaded with 2.5ma each full 5 - - v timing characteristics maximum data rate r l =3kw, c l = 1000pf, one transmitter switching full 250 500 - kbps transmitter skew t phl - t plh full - 200 1000 ns receiver skew t phl - t plh full - 100 1000 ns transition region slew rate v cc =5.0v, r l = 3kw to 7kw, measured from 3v to -3v or -3v to 3v c l = 200pf to 2500pf full 4 8.0 50 v/ s c l = 200pf to 1000pf full 6 - 50 v/ s esd performance rs-232 pins (t out , r in ) human body model (mil-std 883 method 3015) 25 - 15 - kv iec61000-4-2 contact discharge 25 - 8 - kv iec61000-4-2 air gap discharge 25 - 15 - kv all other pins human body model (mil-std 883 method 3015) 25 - 2 - kv electrical specifications icl3221e, icl3232e, icl3243e test conditions: v cc = 4.5v to 5.5v, c1 = 0.01 m f, c2 - c4 = 0.1 m f; unless otherwise specified. typicals are at t a = 25c, v cc = 5.0v (continued) parameter test conditions temp (c) min typ max units electrical specifications icl3238e test conditions: v cc = 4.5v to 5.5v, c1 = 0.01 m f, c2 - c4 = 0.1 m f, unless otherwise specified. typicals are at t a = 25c, v cc = 5.0v parameter test conditions temp (c) min typ max units dc characteristics supply current, automatic power-down all r in open, forceon = gnd, forceoff = v cc full - 1 10 a supply current, power-down forceoff = gnd full - 1 10 a supply current, power-up all outputs unloaded, forceon = forceoff = v cc full - 0.3 1.8 ma logic and transmitter inputs and receiver outputs input logic threshold low t in , forceon, forceoff wake up threshold full - - 0.8 v input logic threshold high t in , forceon, forceoff wake up threshold full 2.4 - - v input leakage current t in , forceon, forceoff , v in = 0v or v cc (note 4) full - 0.01 10 a output leakage current forceoff = gnd full - 0.05 10 a output voltage low i out = 1.0ma full - - 0.4 v output voltage high i out = -1.0ma full v cc -0.9 v cc -0.3 - v receiver inputs input voltage range full -25 - 25 v input threshold low full 0.8 1.5 - v input threshold high full - 1.8 2.4 v input resistance full357k 5962-0620705, 5962- 0620706, 5962-0620707, 5962-0620708
7 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6298.1 november 3, 2011 die characteristics interface materials: glassivation: type: psg (phosphorous silicon glass) thickness: 13.0k? 1.0k? top metallization: type: alsicu thickness: 10.0k? 1k? assembly related information: substrate potential: gnd additional information: worst case current density: <2.0 x 10 5 a/cm 2 transistor count: icl3221e: 286 icl3232e: 296 icl3243e: 464 icl3238e: 1235 process: si gate cmos enhanced automatic power-down (forceon = gnd, forceoff = v cc ) receiver input thresholds to invalid high powered up full -2.7 - 2.7 v receiver input thresholds to invalid low powered down full -0.3 - 0.3 v invalid output voltage low i out = 1.0ma full - - 0.4 v invalid output voltage high i out = -1.0ma full v cc -0.9 - - v transmitter outputs output voltage swing all transmitter outputs loaded with 3k to ground full 5.0 5.4 - v output short-circuit current full - 35 60 ma output leakage current v out = 12v, v cc = 0v or 4.5v to 5.5v, automatic power-down or forceoff = gnd full - - 25 a timing characteristics maximum data rate r l = 3k , c l = 1000pf, one transmitter switching full 250 500 - kbps transmitter skew t phl - t plh full - 200 1000 ns receiver skew t phl - t plh full - 100 1000 ns transition region slew rate v cc = 5.0v, r l = 3k to 7k , measured from 3v to -3v or -3v to 3v c l = 150pf to 1000pf full 6 15 50 v/s c l = 150pf to 2500pf full 4 12 50 v/s esd performance rs-232 pins (t out , r in ) iec61000-4-2 air gap discharge 25 - 15 - kv iec61000-4-2 contact discharge 25 - 8-kv human body model (mil-std 883 method 3015) 25 - 15 - kv all other pins human body model (mil-std 883 method 3015) 25 - 2.5 - kv note: 4. these inputs utilize a positive feedback resistor. the input cu rrent is negligible when the i nput is at either supply rail. electrical specifications icl3238e test conditions: v cc = 4.5v to 5.5v, c1 = 0.01 m f, c2 - c4 = 0.1 m f, unless otherwise specified. typicals are at t a = 25c, v cc = 5.0v (continued) (continued) parameter test conditions temp (c) min typ max units 5962-0620705, 5962- 0620706, 5962-0620707, 5962-0620708
8 fn6298.1 november 3, 2011 5962-0620705, 5962- 0620706, 5962-0620707, 5962-0620708 ceramic leadless chip carrier packages (clcc) d j x 45 o d3 b h x 45 o a a1 e l l3 e b3 l1 d2 d1 e 1 e2 e1 l2 plane 2 plane 1 e3 b2 0.010 e h s s 0.010 e f s s -e- 0.007 e f m s hs b1 -h- -f- j28.a mil-std-1835 cqcc1-n28 (c-4) 28 pad ceramic leadless chip carrier package symbol inches millimeters notes min max min max a 0.060 0.100 1.52 2.54 6, 7 a1 0.050 0.088 1.27 2.23 - b----- b1 0.022 0.028 0.56 0.71 2, 4 b2 0.072 ref 1.83 ref - b3 0.006 0.022 0.15 0.56 - d 0.442 0.460 11.23 11.68 - d1 0.300 bsc 7.62 bsc - d2 0.150 bsc 3.81 bsc - d3 - 0.460 - 11.68 2 e 0.442 0.460 11.23 11.68 - e1 0.300 bsc 7.62 bsc - e2 0.150 bsc 3.81 bsc - e3 - 0.460 - 11.68 2 e 0.050 bsc 1.27 bsc - e1 0.015 - 0.38 - 2 h 0.040 ref 1.02 ref 5 j 0.020 ref 0.51 ref 5 l 0.045 0.055 1.14 1.40 - l1 0.045 0.055 1.14 1.40 - l2 0.075 0.095 1.90 2.41 - l3 0.003 0.015 0.08 0.038 - nd 7 7 3 ne 7 7 3 n28 283 rev. 0 5/18/94 notes: 1. metallized castellations shall be connected to plane 1 terminals and extend toward plane 2 across at least two layers of ceramic or completely across all of the ceramic layers to make electrical connection with the opti onal plane 2 terminals. 2. unless otherwise specified, a minimum clearance of 0.015 inch (0.38mm) shall be maintained between all metallized features (e.g., lid, castellations, terminals, thermal pads, etc.) 3. symbol ?n? is the maximum number of terminals. symbols ?nd? and ?ne? are the number of terminals along the sides of length ?d? and ?e?, respectively. 4. the required plane 1 terminals an d optional plane 2 terminals (if used) shall be elec trically connected. 5. the corner shape (square, notch, radius, etc.) may vary at the manufacturer?s option, from that shown on the drawing. 6. chip carriers shall be constructed of a minimum of two ceramic layers. 7. dimension ?a? controls the over all package thickness. the maxi- mum ?a? dimension is package height before being solder dipped. 8. dimensioning and tolerancing per ansi y14.5m-1982. 9. controlling dimension: inch.
9 fn6298.1 november 3, 2011 5962-0620705, 5962- 0620706, 5962-0620707, 5962-0620708 ceramic leadless chip carrier packages (clcc) d j x 45 o d3 b h x 45 o a a1 e l l3 e b3 l1 d2 d1 e 1 e2 e1 l2 plane 2 plane 1 e3 b2 0.010 e h s s 0.010 e f s s -e- 0.007 e f m s hs b1 -h- -f- j20.a mil-std-1835 cqcc1-n20 (c-2) 20 pad ceramic leadless chip carrier package symbol inches millimeters notes min max min max a 0.060 0.100 1.52 2.54 6, 7 a1 0.050 0.088 1.27 2.23 - b----- b1 0.022 0.028 0.56 0.71 2, 4 b2 0.072 ref 1.83 ref - b3 0.006 0.022 0.15 0.56 - d 0.342 0.358 8.69 9.09 - d1 0.200 bsc 5.08 bsc - d2 0.100 bsc 2.54 bsc - d3 -0.358-9.09 2 e 0.342 0.358 8.69 9.09 - e1 0.200 bsc 5.08 bsc - e2 0.100 bsc 2.54 bsc - e3 -0.358-9.09 2 e 0.050 bsc 1.27 bsc - e1 0.015 - 0.38 - 2 h 0.040 ref 1.02 ref 5 j 0.020 ref 0.51 ref 5 l 0.045 0.055 1.14 1.40 - l1 0.045 0.055 1.14 1.40 - l2 0.075 0.095 1.91 2.41 - l3 0.003 0.015 0.08 0.38 - nd 5 5 3 ne 5 5 3 n20 203 rev. 0 5/18/94 notes: 1. metallized castellations shall be connected to plane 1 terminals and extend toward plane 2 across at least two layers of ceramic or completely across all of the ceramic layers to make electrical connection with the opti onal plane 2 terminals. 2. unless otherwise specified, a minimum clearance of 0.015 inch (0.38mm) shall be maintained between all metallized features (e.g., lid, castellations, terminals, thermal pads, etc.) 3. symbol ?n? is the maximum number of terminals. symbols ?nd? and ?ne? are the number of terminals along the sides of length ?d? and ?e?, respectively. 4. the required plane 1 terminals an d optional plane 2 terminals (if used) shall be elec trically connected. 5. the corner shape (square, notch, radius, etc.) may vary at the manufacturer?s option, from that shown on the drawing. 6. chip carriers shall be constructed of a minimum of two ceramic layers. 7. dimension ?a? controls the over all package thickness. the maxi- mum ?a? dimension is package height before being solder dipped. 8. dimensioning and tolerancing per ansi y14.5m-1982. 9. controlling dimension: inch.
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